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tinyUART
Lightweight UART core in VHDL
VHDL
Emerging
asic
controller
fpga
hardware
GitHub
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14
Forks
2
Contributors
1
Last push
17mo ago
Recent commits
Latest commits.
[ci] adjust ghdl, fix #2
5f8dc5a
Andreas Kaeberlein
17mo ago
add CI state badge
a019468
Andreas Kaeberlein
58mo ago
add CI for tiny_uart_baud_bit_gen_tb.vhd and tiny_uart_tb.vhd
e4cbf46
Andreas Kaeberlein
58mo ago
introduce CI
8299e76
Andreas Kaeberlein
58mo ago
header correction
d4a459d
Andreas Kaeberlein
61mo ago
minor
204ea94
Andreas Kaeberlein
61mo ago
prepare for new tag
b156d4c
Andreas Kaeberlein
61mo ago
adjust
0e7d0cc
Andreas Kaeberlein
62mo ago
Top contributors
Builders behind this project.
akaeba
140 commits
