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VHDL

ghdl

VHDL 2008/93/87 simulator

VHDLEmerging

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Contributors

8

Last push

36mo ago

Recent commits

Latest commits.

testsuite/gna: add a test for #2460
472cf64Tristan Gingold36mo ago
vhdl: avoid a crash on elaboration of invalid imported design
9f2abe7Tristan Gingold36mo ago
testsuite/gna: add a test for #2459
9113b79Tristan Gingold36mo ago
trans-chap7.adb(translate_range_length): handle reverse_range
5c8c288Tristan Gingold36mo ago
verilog: preliminary work for foreign modules
a68ebc8Tristan Gingold36mo ago

verilog: add Makefile to regenerate files

d5f9c55Tristan Gingold36mo ago

testsuite/synth: add a test for verilog translate on/off

2dbb2e2Tristan Gingold37mo ago

testsuite/synth: add a test for verilog parameters

274cf03Tristan Gingold37mo ago

Top contributors

Builders behind this project.

gingold-adacore