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silisizer
donn/silisizer
Verilog
Emerging
GitHub
Stars
2
Forks
—
Contributors
3
Last push
22d ago
Recent commits
Latest commits.
feat: add ci, test, submodule update dependabot
bde12f8
Mohamed Gaber
8mo ago
Update OpenSTA
d913b8b
Akash Levy
8mo ago
Bump OpenSTA
34c90c3
Akash Levy
8mo ago
Bump OpenSTA
6c682e7
Akash Levy
9mo ago
Bump OpenSTA
ae7985e
Akash Levy
9mo ago
Catch anything
a2831d8
Akash Levy
9mo ago
Bump OpenSTA
274f3be
Akash Levy
9mo ago
Fix TCL_LIBRARY issue
56284a9
Akash Levy
9mo ago
Top contributors
Builders behind this project.
akashlevy
186 commits
alaindargelas
34 commits
donn
1 commits
