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circt

Circuit IR Compilers and Tools

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8
Last push
12h ago

Recent commits

Latest commits.

  • [ESI] Set '--output-split' for verilator compilation (#8978)
    2c424efMorten Borup Petersen9mo ago
  • [ESI] Add skid buffer to Cosim_Endpoint_ToHost (#8983)
    0886d5eJohn Demme9mo ago
  • [Moore] Add support for $random system task (#8982)
    2b2a4d9MoritzScherer9mo ago
  • [Reduce] Fix make-symbols-private test on macOS
    2296be7Fabian Schuiki9mo ago
  • [FIRRTL] Add reduction that moves MustDedup onto children (#8969)
    4c720dcFabian Schuiki9mo ago
[FIRRTL] Emit fopen calls to get fd's not mcd's.
fa523d8Will Dietz9mo ago
  • [ImportVerilog][Moore] Add support for %t format specifier, introduce `moore.fmt.time` (#8979)
    bf6b633MoritzScherer9mo ago
  • [FIRRTL] Add a few debug prints to the dedup pass
    6e3b6adFabian Schuiki9mo ago

    • Top contributors

    Builders behind this project.

    seldridge
    1.1K commits
    teqdruid
    1.1K commits
    lattner
    1.1K commits
    dtzSiFive
    762 commits
    fabianschuiki
    744 commits
    darthscsi
    644 commits
    uenoku
    640 commits
    youngar
    614 commits