Loreon
Labs
Platform
Docs
Home
Ecosystems
Verilog
ECE5760-Julia
ipburbank/ECE5760-Julia
Verilog
Emerging
GitHub
Stars
—
Forks
—
Contributors
1
Last push
111mo ago
Recent commits
Latest commits.
Website - Progress
d580cea
Istvan Burbank
111mo ago
Demo'd. Does not work
a38636c
Istvan Burbank
111mo ago
Fix setup instructions and make them run 4 cycles
ed8d2d7
Istvan Burbank
111mo ago
TEMPORARY DEBUG: set `max_magnitude` to 1/2
1a1836e
Istvan Burbank
111mo ago
Updated qsys to fix timing of vga/solver_clock
377983c
Istvan Burbank
111mo ago
Debug Adventure: draws left half of screen in red
b6966aa
Istvan Burbank
111mo ago
Wrap program instruction number at 5 (for now)
8e884cd
Istvan Burbank
111mo ago
Qsys update
6ab47c0
Istvan Burbank
111mo ago
Top contributors
Builders behind this project.
ipburbank
56 commits